onnx2versal
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conv.h
1#ifndef CONV_H_
2#define CONV_H_
3
4#include <adf.h>
5#include <assert.h>
6
7
38template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
39 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
40class ConvReluScalar {
41
42 private:
43 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
44 static constexpr int C_PER_M = C / GROUP; // each m kernel of shape (1,C_PER_M,K,K) applied on input of shape (1,C_PER_M,H,W)
45 alignas(32) float (&weights)[M*KH*KW*C];
46 alignas(32) float (&bias)[M];
47
48 public:
49 ConvReluScalar(
50 float (&w)[M*KH*KW*C],
51 float (&b)[M]
52 ): weights(w), bias(b) {};
53
54 void filter(
55 input_window<float>* in, // BCHW
56 output_window<float>* out // BMHW
57 );
58
59 static void registerKernelClass() {
60 static_assert(C % GROUP == 0);
61 REGISTER_FUNCTION(ConvReluScalar::filter);
62 REGISTER_PARAMETER(weights);
63 REGISTER_PARAMETER(bias);
64 }
65
66};
67
68
75template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
76 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
77class Conv5x5on8Relu {
78
79 private:
80 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
81 alignas(32) float (&weights)[M*C*KH*8];
82 alignas(32) float (&bias)[M];
83
84 public:
85 Conv5x5on8Relu(
86 float (&w)[M*C*KH*8],
87 float (&b)[M]
88 ): weights(w), bias(b) {};
89
90 void filter(
91 input_window<float>* in, // BCHW
92 output_window<float>* out // BMHW
93 );
94
95 static void registerKernelClass() {
96 static_assert(GROUP == 1);
97 static_assert(KH==5);
98 static_assert(KW==5);
99 static_assert(INP_W%4==0);
100 static_assert(OUT_W_PAD%8==0);
101 static_assert(STEP_H == 1 && STEP_W == 1);
102 REGISTER_FUNCTION(Conv5x5on8Relu::filter);
103 REGISTER_PARAMETER(weights);
104 REGISTER_PARAMETER(bias);
105 }
106
107};
108
109
116template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
117 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
118class ConvHx4Relu {
119
120 private:
121 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
122 static constexpr int CKK_ROW_SIZE = C*((KH*KW+3)/4*4);
123
124 alignas(32) float (&weights)[M*CKK_ROW_SIZE];
125 alignas(32) float (&bias)[M];
126
127 public:
128 ConvHx4Relu(
129 float (&w)[M*CKK_ROW_SIZE],
130 float (&b)[M]
131 ): weights(w), bias(b) {};
132
133 void filter(
134 input_window<float>* in, // BCHW
135 output_window<float>* out // BMHW
136 );
137
138 static void registerKernelClass() {
139 static_assert(GROUP == 1);
140 static_assert(KW<=4);
141 static_assert(INP_W%4==0);
142 static_assert(OUT_W_PAD%8==0);
143 static_assert(STEP_H == 1 && STEP_W == 1);
144 REGISTER_FUNCTION(ConvHx4Relu::filter);
145 REGISTER_PARAMETER(weights);
146 REGISTER_PARAMETER(bias);
147 }
148
149};
150
151
157template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
158 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
159class Conv1x1Relu {
160
161 private:
162 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
163
164 alignas(32) float (&weights)[M*C];
165 alignas(32) float (&bias)[M];
166
167 public:
168 Conv1x1Relu(
169 float (&w)[M*C],
170 float (&b)[M]
171 ): weights(w), bias(b) {};
172
173 void filter(
174 input_window<float>* in, // BCHW
175 output_window<float>* out // BMHW
176 );
177
178 static void registerKernelClass() {
179 static_assert(GROUP == 1);
180 static_assert(KH==1);
181 static_assert(KW==1);
182 static_assert(INP_W%4==0);
183 static_assert(OUT_W_PAD%8==0 && STEP_W==1 || OUT_W_PAD%4==0 && STEP_W==2);
184 static_assert(STEP_H == 1 || STEP_H == 2);
185 static_assert(STEP_W == 1 || STEP_W == 2);
186 REGISTER_FUNCTION(Conv1x1Relu::filter);
187 REGISTER_PARAMETER(weights);
188 REGISTER_PARAMETER(bias);
189 }
190
191};
192
193
200template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
201 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
202class ConvReluScalarStream {
203
204 private:
205 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
206 static constexpr int C_PER_M = C / GROUP; // each m kernel of shape (1,C_PER_M,K,K) applied on input of shape (1,C_PER_M,H,W)
207 static constexpr int CKK_ROW_SIZE = C_PER_M*KH*KW;
208 alignas(32) float (&bias)[M];
209 alignas(32) float ckk_row[CKK_ROW_SIZE];
210
211 public:
212 ConvReluScalarStream(
213 float (&b)[M]
214 ): bias(b) {};
215
216 void filter(
217 input_window<float>* in, // BCHW
218 input_stream<float>* weights, // MCKK
219 output_stream<float>* out // BMHW
220 );
221
222 static void registerKernelClass() {
223 static_assert(C % GROUP == 0);
224 REGISTER_FUNCTION(ConvReluScalarStream::filter);
225 REGISTER_PARAMETER(bias);
226 }
227
228};
229
230
236template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
237 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
238class ConvHx8ReluStream {
239
240 private:
241 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
242 static constexpr int C_PER_M = C / GROUP; // each m kernel of shape (1,C_PER_M,K,K) applied on input of shape (1,C_PER_M,H,W)
243 static constexpr int CKK_ROW_SIZE = C_PER_M*KH*8;
244 alignas(32) float (&bias)[M];
245 alignas(32) float ckk_row[CKK_ROW_SIZE];
246 alignas(32) float width_row[OUT_W_PAD];
247
248 public:
249 ConvHx8ReluStream(
250 float (&b)[M]
251 ): bias(b) {};
252
253 void filter(
254 input_window<float>* in, // BCHW
255 input_stream<float>* weights, // MCKK
256 output_stream<float>* out // BMHW
257 );
258
259 static void registerKernelClass() {
260 static_assert(C % GROUP == 0);
261 static_assert(KW<=8);
262 static_assert(INP_W%4==0);
263 static_assert(OUT_W_PAD%8==0);
264 static_assert(STEP_H == 1 && STEP_W == 1);
265 REGISTER_FUNCTION(ConvHx8ReluStream::filter);
266 REGISTER_PARAMETER(bias);
267 }
268
269};
270
271
279template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
280 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
281class ConvHx4ReluStream {
282
283 private:
284 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
285 static constexpr int C_PER_M = C / GROUP; // each m kernel of shape (1,C_PER_M,K,K) applied on input of shape (1,C_PER_M,H,W)
286 static constexpr int CKK_ROW_SIZE = C_PER_M*((KH*KW+3)/4*4);
287 static constexpr unsigned int X_OFFSET = (STEP_W == 1) ? 0x76543210 : ((STEP_W == 2) ? 0x00006420 : 0x0000c840);
288 static constexpr int W_LOOP_STEP = (STEP_W == 1) ? 8 : 4;
289 static constexpr int W_LOOP_IN_STEP = (STEP_W != 4) ? 8 : 16;
290
291 alignas(32) float (&bias)[M];
292 alignas(32) float ckk_row[CKK_ROW_SIZE];
293
294 public:
295 ConvHx4ReluStream(
296 float (&b)[M]
297 ): bias(b) {};
298
299 void filter(
300 input_window<float>* in, // BCHW
301 input_stream<float>* weights, // MCKK
302 output_stream<float>* out // BMHW
303 );
304
305 static void registerKernelClass() {
306 static_assert(KW<=4);
307 static_assert(INP_W%4==0);
308 static_assert(OUT_W_PAD%8==0 && STEP_W==1 || OUT_W_PAD%4==0 && STEP_W==2 || OUT_W_PAD%4==0 && STEP_W == 4);
309 static_assert(STEP_H == 1 || STEP_H == 2 || STEP_H == 4);
310 static_assert(STEP_W == 1 || STEP_W == 2 || STEP_W == 4);
311 REGISTER_FUNCTION(ConvHx4ReluStream::filter);
312 REGISTER_PARAMETER(bias);
313 }
314
315};
316
317
323template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
324 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
325class ConvHx4ReluStreamMultiRow {
326
327 private:
328 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
329 static constexpr int CKK_ROW_SIZE = C*((KH*KW+3)/4*4);
330 static constexpr unsigned int X_OFFSET = 0x76543210;
331
332 alignas(32) float (&bias)[M];
333 alignas(32) float ckk_row[CKK_ROW_SIZE];
334 alignas(32) float out_row[OUT_W_PAD];
335
336 public:
337 ConvHx4ReluStreamMultiRow(
338 float (&b)[M]
339 ): bias(b) {};
340
341 void filter(
342 input_window<float>* in, // BCHW
343 input_stream<float>* weights, // MCKK
344 output_stream<float>* out // BMHW
345 );
346
347 static void registerKernelClass() {
348 static_assert(GROUP == 1);
349 static_assert(KH==3);
350 static_assert(KW==3);
351 static_assert(INP_W%4==0);
352 static_assert(OUT_W_PAD%8==0);
353 static_assert(STEP_H == 1);
354 static_assert(STEP_W == 1);
355 REGISTER_FUNCTION(ConvHx4ReluStreamMultiRow::filter);
356 REGISTER_PARAMETER(bias);
357 }
358
359};
360
361
366template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
367 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
368class ConvHx4Out4ReluStream {
369
370 private:
371 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
372 static constexpr int C_PER_M = C / GROUP; // each m kernel of shape (1,C_PER_M,K,K) applied on input of shape (1,C_PER_M,H,W)
373 static constexpr int CKK_ROW_SIZE = C_PER_M*((KH*KW+3)/4*4);
374
375 alignas(32) float (&bias)[M];
376 alignas(32) float ckk_row[CKK_ROW_SIZE];
377
378 public:
379 ConvHx4Out4ReluStream(
380 float (&b)[M]
381 ): bias(b) {};
382
383 void filter(
384 input_window<float>* in, // BCHW
385 input_stream<float>* weights, // MCKK
386 output_stream<float>* out // BMHW
387 );
388
389 static void registerKernelClass() {
390 static_assert(KW<=4);
391 static_assert(INP_W%4==0);
392 static_assert(OUT_W_PAD == 4);
393 static_assert(STEP_H == 1);
394 static_assert(STEP_W == 1);
395 REGISTER_FUNCTION(ConvHx4Out4ReluStream::filter);
396 REGISTER_PARAMETER(bias);
397 }
398
399};
400
401
407template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
408 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
409class Conv1x1ReluStream {
410
411 private:
412 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
413 static constexpr int CKK_ROW_SIZE = (C+3)/4*4;
414
415 alignas(32) float (&bias)[M];
416 alignas(32) float ckk_row[CKK_ROW_SIZE];
417
418 public:
419 Conv1x1ReluStream(
420 float (&b)[M]
421 ): bias(b) {};
422
423 void filter(
424 input_window<float>* in, // BCHW
425 input_stream<float>* weights, // MCKK
426 output_stream<float>* out // BMHW
427 );
428
429 static void registerKernelClass() {
430 static_assert(GROUP == 1);
431 static_assert(KH==1);
432 static_assert(KW==1);
433 static_assert(INP_W%4==0);
434 static_assert(OUT_W_PAD%8==0 && STEP_W==1 || OUT_W_PAD%4==0 && STEP_W==2);
435 static_assert(STEP_H == 1 || STEP_H == 2);
436 static_assert(STEP_W == 1 || STEP_W == 2);
437 REGISTER_FUNCTION(Conv1x1ReluStream::filter);
438 REGISTER_PARAMETER(bias);
439 }
440
441};
442
443
448template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
449 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
450class Conv1x1Out4ReluStream {
451
452 private:
453 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
454 static constexpr int C_PER_M = C / GROUP; // each m kernel of shape (1,C_PER_M,K,K) applied on input of shape (1,C_PER_M,H,W)
455 static constexpr int CKK_ROW_SIZE = (C_PER_M+3)/4*4;
456
457 alignas(32) float (&bias)[M];
458 alignas(32) float ckk_row[CKK_ROW_SIZE];
459
460 public:
461 Conv1x1Out4ReluStream(
462 float (&b)[M]
463 ): bias(b) {};
464
465 void filter(
466 input_window<float>* in, // BCHW
467 input_stream<float>* weights, // MCKK
468 output_stream<float>* out // BMHW
469 );
470
471 static void registerKernelClass() {
472 static_assert(KW<=4);
473 static_assert(INP_W%4==0);
474 static_assert(OUT_W_PAD == 4);
475 static_assert(STEP_H == 1);
476 static_assert(STEP_W == 1);
477 REGISTER_FUNCTION(Conv1x1Out4ReluStream::filter);
478 REGISTER_PARAMETER(bias);
479 }
480
481};
482
483
488template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
489 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
490class ConvHx4ReluPktStream {
491
492 private:
493 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
494 static constexpr int C_PER_M = C / GROUP; // each m kernel of shape (1,C_PER_M,K,K) applied on input of shape (1,C_PER_M,H,W)
495 static constexpr int CKK_ROW_SIZE = C_PER_M*((KH*KW+3)/4*4);
496 static constexpr int INP_SIZE = B*C*INP_H*INP_W;
497
498 static constexpr unsigned int X_OFFSET = (STEP_W == 1) ? 0x76543210 : ((STEP_W == 2) ? 0x00006420 : 0x0000c840);
499 static constexpr int W_LOOP_STEP = (STEP_W == 1) ? 8 : 4;
500 static constexpr int W_LOOP_IN_STEP = (STEP_W != 4) ? 8 : 16;
501
502 alignas(32) float (&bias)[M];
503 alignas(32) float ckk_row[CKK_ROW_SIZE];
504 alignas(32) float in[INP_SIZE];
505
506 public:
507 ConvHx4ReluPktStream(
508 float (&b)[M]
509 ): bias(b) {};
510
511 void filter(
512 input_pktstream* in_s, // BCHW
513 input_stream<float>* weights, // MCKK
514 output_stream<float>* out // BMHW
515 );
516
517 static void registerKernelClass() {
518 static_assert(KW<=4);
519 static_assert(INP_W%4==0);
520 static_assert(OUT_W_PAD%8==0 && STEP_W==1 || OUT_W_PAD%4==0 && STEP_W==2 || OUT_W_PAD%4==0 && STEP_W == 4);
521 static_assert(STEP_H == 1 || STEP_H == 2 || STEP_H == 4);
522 static_assert(STEP_W == 1 || STEP_W == 2 || STEP_W == 4);
523 REGISTER_FUNCTION(ConvHx4ReluPktStream::filter);
524 REGISTER_PARAMETER(bias);
525 }
526
527};
528
529
534template <int INP_H, int INP_W, int OUT_W, int OUT_W_PAD, int STEP_H, int STEP_W,
535 int B, int C, int M, int KH, int KW, int GROUP, int IS_RELU>
536class Conv1x1ReluPktStream {
537
538 private:
539 static constexpr int OUT_H = (INP_H - KH) / STEP_H + 1;
540 static constexpr int CKK_ROW_SIZE = (C+3)/4*4;
541 static constexpr int INP_SIZE = B*C*INP_H*INP_W;
542
543 alignas(32) float (&bias)[M];
544 alignas(32) float ckk_row[CKK_ROW_SIZE];
545 alignas(32) float in[INP_SIZE];
546
547 public:
548 Conv1x1ReluPktStream(
549 float (&b)[M]
550 ): bias(b) {};
551
552 void filter(
553 input_pktstream* in_s, // BCHW
554 input_stream<float>* weights, // MCKK
555 output_stream<float>* out // BMHW
556 );
557
558 static void registerKernelClass() {
559 static_assert(GROUP == 1);
560 static_assert(KH==1);
561 static_assert(KW==1);
562 static_assert(INP_W%4==0);
563 static_assert(OUT_W_PAD%8==0 && STEP_W==1 || OUT_W_PAD%4==0 && STEP_W==2);
564 static_assert(STEP_H == 1 || STEP_H == 2);
565 static_assert(STEP_W == 1 || STEP_W == 2);
566 REGISTER_FUNCTION(Conv1x1ReluPktStream::filter);
567 REGISTER_PARAMETER(bias);
568 }
569
570};
574#endif // CONV_H_
Conv1x1Out4ReluStream
Vector stream implementation for OUT_W == 4 < 8, stores biases, requires KH==KW==1,...
Definition conv.h:450
Conv1x1ReluPktStream
Vector stream implementation for BCHW, stores biases, requires KH==KW==1, INP_W%4==0,...
Definition conv.h:536
Conv1x1ReluStream
Vector stream implementation for BCHW, stores biases, requires KH==KW==1, INP_W%4==0,...
Definition conv.h:409
Conv1x1Relu
Vector stream implementation for BCHW, stores weights and biases, requires KH==KW==1,...
Definition conv.h:159
Conv5x5on8Relu
Vector implementation for 5x5 BCHW, stores weights and biases, requires KH==KW==5,...
Definition conv.h:77
ConvHx4Out4ReluStream
Vector stream implementation for OUT_W == 4 < 8, stores biases, requires KW<=3, INP_W%4==0,...
Definition conv.h:368
ConvHx4ReluPktStream
Vector stream implementation for BCHW, stores biases, requires KW<=3, INP_W%4==0, OUT_W_PAD%(8|4)==0,...
Definition conv.h:490
ConvHx4ReluStreamMultiRow
Vector stream implementation for BCHW, stores biases, requires KH==KW==3, INP_W%4==0,...
Definition conv.h:325
ConvHx4ReluStream
Vector stream implementation for BCHW, stores biases, requires KW<=3, INP_W%4==0, OUT_W_PAD%(8|4)==0,...
Definition conv.h:281
ConvHx4Relu
Vector implementation for 3x3 BCHW, stores weights and biases, requires KW<=4, INP_W%4==0,...
Definition conv.h:118
ConvHx8ReluStream
Scalar stream implementation for BCHW, stores biases, requires GROUP==1, ConvHx8ReluStream<28,...
Definition conv.h:238
ConvReluScalarStream
Scalar stream implementation for BCHW, stores biases, requires GROUP==1, ConvReluScalarStream<26,...
Definition conv.h:202
ConvReluScalar
Scalar implementation for BCHW, stores weights and biases, requires GROUP==1, ConvReluScalar<28,...
Definition conv.h:40